ShaqWave
A hundredfold past same-node CMOS on speed and latency, using process nodes that already exist — no new fab required.
100×
Target past same-node CMOS
No new fab
Existing process nodes
Speed & latency
Where the gain lands
Progress got tied to the next node.
For a generation, speed came from shrinking the transistor. That path is now slower, far more expensive, and open to a shrinking number of fabs. Most of the industry cannot follow it, and even those who can wait years and spend billions for each step.
But a process node is not spent. The same node can carry far more performance than same-node CMOS extracts from it — the limit has been the circuit technique, not the silicon.
Get more from the node you have.
01
Circuit-level technique
ShaqWave targets a 100× improvement in speed and latency over same-node CMOS through the circuit design itself, on process nodes that are already in volume production.
02
No new fabrication
Because the gain is in how the circuit is built rather than in a smaller feature size, it is manufacturable on existing lines — decoupling performance from access to the leading edge.
SHA-256d, in a single ripple.
The first workload we ran the technique against is the one the whole proof-of-work economy stands on: SHA-256d, the double hash at the heart of Bitcoin and most mining chains. SHAQwave reduces the whole double-hash to a single wave of logic — no loops, no stalls — so a hash resolves in one uninterrupted pass, rather than marching through a hundred-plus pipeline stages.
On the same process node and the same die area as a modern mining ASIC, the target is a first hash in under 130 picoseconds against roughly 130 nanoseconds for the ASIC — while drawing under a tenth of the power. Per-core throughput stays comparable; what changes is the path the signal takes to get there — and that path is where the energy has always gone.
Blockchain mining has already climbed this ladder once. Each rung brought a step-change in hashes per second and per watt — and each one reset who could profitably compete:
- CPUGeneral purpose
- GPUMassively parallel
- FPGAReconfigurable
- ASICFixed-function
- ShaqWaveWavefront logic
| SHA-256d, per core | 7nm mining ASIC | ShaqWave Q-wavefront |
|---|---|---|
| Time to first hash | ~130 ns | < 130 ps |
| First-hash latency | Baseline | > 1000× lower |
| Throughput per core | High | Comparable |
| Power at equal area | 100% | < 10% |
| Switching activity | High | Minimal |
Figures are targets and internal measurements of the SHA-256d wavefront core at proof-of-concept stage, benchmarked against a published 7nm ASIC. Full characterisation is disclosed to prospective partners and investors under agreement — the core itself is not open.
Mining is a race to a single number: the first miner to land a hash beneath the target takes the block and the newly minted coins — every time. Speed to that hash is the whole contest.
And it is not about mere throughput. At matched throughput, ShaqWave lands a thousand hashes before a current-generation ASIC returns its first — the block is claimed before the competition resolves hash number one.
Every prior rung on the ladder — CPU to GPU to FPGA to ASIC — bought that speed the same way, by multiplying more engines of the same fundamental kind. ShaqWave changes the kind of engine. Collapsing time-to-first-hash by a thousandfold is not a linear step along the curve; it is a 10³ phase change in how the hash is computed — reached in a single propagation ripple rather than a hundred-stage march. Holding throughput while cutting energy per hash by roughly an order of magnitude at the same node, its effect on proof-of-work is not incremental but asymmetric: whoever fields it can match an entire network's hashrate at a fraction of its power bill.
Proof-of-work rewards the cheapest joule. Change the architecture, and the frontier moves again.
ShaqWave is not open source. We are selecting a small number of partners and investors to fund the next performance step-up of the blockchain economy — with first access to the SHA-256d core, its measured characterisation and the roadmap behind it.
On silicon, being measured.
| Milestone | Status | Evidence |
|---|---|---|
| Circuit technique in silicon | Simulated | Simulation |
| Same-node CMOS comparison | In progress | Characterisation ongoing |
| Independent measurement | Next | — |
| Reference block | In progress | SHA-256d wavefront core |
Figures on this page are targets and internal measurements at proof-of-concept stage. Commercial rights are reserved for the partners, investors and spin-off company this work is raising to build.
Characterise, then prove it out.
The work ahead characterises the technique against same-node CMOS, has the comparison measured by a party that did not build it, and demonstrates it in a reference block a partner can evaluate.
ShaqWave spins out of Research ByIQ once the advantage is confirmed in independent measurement.